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A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs |
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| Authors: | S. Matakias Y. Tsiatouhas A. Arapoyanni Th. Haniotakis |
| Affiliation: | (1) Department of Informatics & Telecom., University of Athens, Panepistimioupolis, 15784 Athens, Greece.;(2) Department of Computer Science, University of Ioannina, P.O. Box 1186, 45110 Ioannina, Greece. |
| Abstract: | In this paper a new circuit for concurrent soft and timing error detection in CMOS ICs is presented. The circuit is based on current mode sense amplifier topologies to provide fast error detection times. After an error has been detected it can be corrected by using a retry cycle. |
| Keywords: | concurrent testing soft and timing errors monitoring circuits time redundancy |
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