| 片上系统设计中事务级建模技术综述 |
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| 引用本文： | 童琨,边计年. 片上系统设计中事务级建模技术综述[J]. 计算机辅助设计与图形学学报, 2007, 19(11): 1365-1372 |
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| 作者姓名： | 童琨 边计年 |
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| 作者单位： | 清华大学计算机科学与技术系,北京,100084;清华大学计算机科学与技术系,北京,100084 |
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| 基金项目： | 国家自然科学基金 , 国家自然科学基金 , 国家重点基础研究发展计划(973计划) |
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| 摘 要： | 随着集成电路复杂度的提高,事务级建模成为了片上系统设计中一个新的研究方向.系统地总结了近年来事务级建模技术的研究热点及设计者关注的问题,介绍了该技术在建模与模拟验证中的作用与优势;分析了事务级建模发展中需要解决的问题,并对其前景进行了展望.
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| 关 键 词： | 片上系统 事务级建模 模拟 验证 |
| 收稿时间： | 2007-01-29 |
| 修稿时间： | 2007-07-10 |
A Survey on Transaction Level Modeling for System-on-Chip Design |
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| Tong Kun,Bian Jinian. A Survey on Transaction Level Modeling for System-on-Chip Design[J]. Journal of Computer-Aided Design & Computer Graphics, 2007, 19(11): 1365-1372 |
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| Authors: | Tong Kun Bian Jinian |
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| Affiliation: | Department of Computer Science and Technology, Tsinghua University, Beijing 100084 |
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| Abstract: | As the complexity of integrated circuit increases dramatically,the transaction level modeling(TLM)paradigm becomes a new research area in System-on-Chip(SoC)design.This paper presents a comprehensive survey of the researches and developments of TLM in recent years,including the involved key issues the efforts and advantages of TLM in modeling,simulation and verification.Besides the challenges,open issues and future perspectives are also highlighted. |
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| Keywords: | system-on-chip(SoC) transaction level modeling simulation verification |
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