| 6Gsps数据采集存储系统的设计与实现 |
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| 引用本文： | 张晓东,黄建国,曾浩. 6Gsps数据采集存储系统的设计与实现[J]. 电子质量, 2009, 0(1): 16-18 |
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| 作者姓名： | 张晓东 黄建国 曾浩 |
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| 作者单位： | 电子科技大学自动化工程学院,四川,成都,610054 |
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| 摘 要： | 文中提出了一种基于两片AD拼合、采用多路数据存储技术，采样率为6Gsps的超高速数据采集存储系统设计和实现方法。系统采用AD＋FPGA＋DSP的系统构架，剩用两片AD交替采样以及每片4路数据流并行存储技术，在有效降低每路数据的传输速度同时，及时存储大量数据。
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| 关 键 词： | 高速ADC 数据采集 并行存储 |
Design and Implementation of 6Gsps Data Acquisition Storage System |
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| Zhang Xiao-dong,Huang Jian-guo,Zeng Hao. Design and Implementation of 6Gsps Data Acquisition Storage System[J]. Electronics Quality, 2009, 0(1): 16-18 |
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| Authors: | Zhang Xiao-dong Huang Jian-guo Zeng Hao |
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| Affiliation: | School of Automation Engineering;UESTC;Sichuan Chengdu 610054 |
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| Abstract: | This article presents a design and Implementation of ultra-high-speed data acquisition storage system with 6Gsps Sampling Rate, based on a mosaic method of two ADCs and multi-channel data storage technique. The techniques of two ADCs alternating sampling as well as four-way data stream parallel storage for each chip, which used the AD+FPGA+DSP architecture can reduce data transmission of each channel efficiently and also store large amounts of data opportunely. |
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| Keywords: | high-speed ADC data acquisition parallel storage |
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