| 一种用于数字下变频的高阶分布式FIR滤波器及FPGA实现 |
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| 引用本文： | 程远东,郑晶翔.一种用于数字下变频的高阶分布式FIR滤波器及FPGA实现[J].电子技术应用,2011,37(2):57-59. |
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| 作者姓名： | 程远东 郑晶翔 |
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| 作者单位： | 程远东,Cheng Yuandong(四川信息职业技术学院,电子工程系,四川,广元,628017);郑晶翔,Zheng Jingxiang(成都道惟尔科技有限公司,四川,成都,610017) |
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| 摘 要： | 设计了一种用于数字下变频的256阶分布式FIR滤波器.通过分析分布式FIR滤器结构给实现电路所需资源和运算速度带来的影响,确定了适用于Cyclone Ⅲ系列FPGA的实现结构.在Cyclone Ⅲ系列EP3C40F484C6N芯片上实现该算法并分析了资源消耗与电路速度.
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| 关 键 词： | FPGA FIR滤波器 分布式算法 |
An implementation of high-order FIR filter with distributed algorithm for digital down conversion based on FPGA |
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| Cheng Yuandong,Zheng Jingxiang.An implementation of high-order FIR filter with distributed algorithm for digital down conversion based on FPGA[J].Application of Electronic Technique,2011,37(2):57-59. |
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| Authors: | Cheng Yuandong Zheng Jingxiang |
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| Affiliation: | Cheng Yuandong1,Zheng Jingxiang2(1.Department of Electronic Engineering,Sichuan Information College,Guangyuan 628017,China,2.Chengdu Dowell Technology Corporation Limited,Chengdu 610017,China) |
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| Abstract: | A 256-order distributed FIR filter for digital down conversion is described in this article.To analysis the impact on resource consumption and speed when implementation the circuit because of the structure of the FIR filter,the structure of the circuit which is implemented on FPGA is determined.The algorithm is implemented on Cyclone III EP3C40F484C6N,after that the resource consumption and speed of FPGA is analyzed. |
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| Keywords: | FPGA |
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