High-speed dual-modulus prescaler architecture for programmabledigital frequency dividers |
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Authors: | Tournier E. Sie M. Graffeuil J. |
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Affiliation: | Lab. d'Autom. et d'Anal. des Syst., CNRS, Toulouse ; |
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Abstract: | A new high-speed architecture for a dual-modulus prescaler N/N+1 divider is presented and compared to the widely used Johnson counter, in addition to some other approaches that have inherent limitations of speed when the '+1' of the N+1 divider is processed. This high-speed structure allows a speed similar to that of a simple divider-by-two from which it derives |
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