n+/p+ Gate Bulk FinFETs With Locally Separated Channel Structure for Sub-50-nm DRAM Cell Transistors |
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Authors: | Han-A-Reum Jung Ki-Heung Park Jong-Ho Lee |
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Affiliation: | Kyungpook Nat. Univ., Daegu; |
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Abstract: | We proposed a new p+/n+ poly-Si gate bulk fin-type field-effect transistor that has two channel fins separated locally by a shallow trench filled with oxide or p+ polygate. Key device characteristics were investigated by changing the n+ poly-Si gate length La, the material filling the trench, and the width and length of the trench at a given gate length Lg. It was shown that the trench filled with p+ poly-Si gate should not be contacted with the source/drain diffusion region to achieve an excellent Ion/Ioff (> 1010) that is suitable for sub-50-nm dynamic random access memory cell transistors. Based on the aforementioned device structure, we designed reasonable Ls/Lg and channel fin width Wcfin at given Lg 's of 30, 40, and 50 nm. |
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