RHiNET-2/SW: a high-throughput, compact network-switch using 8.8-gbit/s optical interconnection

We have developed a high-throughput, compact network switch (the RHiNET-2/SW) for a distributed parallel computing system. Eight pairs of 800-Mbit/s×12-channel optical interconnection modules and a CMOS ASIC switch are integrated on a compact circuit board. To realize high-throughput (64 Gbit/s) and low-latency network, the SW-LSI has a customized high-speed LVDS I/O interface, and a high-speed internal SRAM memory in a 784-pin BGA one-chip package. We have also developed device implementation technologies to overcome the electrical problems (loss and crosstalk) caused by such high integration. The RHiNET-2/SW system enables high-performance parallel processing in a distributed computing environment. Shinji Nishimura: He is a researcher in the Department of Network System at the Central Research Laboratory, Hitachi Ltd., at Tokyo. He obtained his bachelors degree in Electronics Engineering from the University of Tokyo in 1989, and his M.E. from the University of Tokyo in 1991. He joined a member of the Optical Interconnection Hitachi Laboratory from 1992. His research interests are in hardware technology for the optical interconnection technologies in the computer and communication systems. Katsuyoshi Harasawa: He is a Senior Enginner of Hitachi Communication Systems Inc. He obtained his bachelors degree in Electrical Engineering from Tokyo Denki University. He is a chief of development of the devices and systems for the optical telecommunication. He was engaged in Development of Optical Reciever and Transmitter module. He joined RWCP project from 1997. His research interests are in hardward technology for optical interconnection in distributed parallel computing system (RHiNET). Nobuhiro Matsudaira: He is a engineer in the Hitachi Communication Systems, Inc. He obtained his bachelors degree in Mercantile Marine Engineering from the Kobe University of Mercantile Marine in 1986. He was engaged in Development of Optical Reciever and Transmitter module at 2.4 Gbit/s to 10Gbit/s. He joined RWCP project from 1998. His reserch interests are in hardware technology for the optical interconnection technology in the computer and communication systems. Shigeto Akutsu: He is a staff in Hitachi Communication Systems Inc. He obtained his bachelors degree in Electronics from Kanagawa University, Japan in 1998. His research interests are hardware technology for the optical interconnection technology in the computer and communication systems. Tomohiro Kudoh, Ph.D.: He received Ph.D. degree from Keio University, Japan in 1992. He has been chief of the parallel and distributed architecture laboratory, Real World Computing Partnership since 1997. His research interests include the area of parallel processing and network for high performance computing. Hiroaki Nishi: He received B.E., M.E. from Keio University, Japan, in 1994, 1996, respectively. He joined Parallel & Distributed Architecture Laboratory, Real World Computing Partnership in 1999. He is currently working on his Ph.D. His research interests include area of interconnection networks. Hideharu Amano, Ph.D.: He received Ph.D. degree from Keio University, Japan in 1986. He is now an Associate Professor in the Department of Information and Computer Science, Keio University. His research interests include the area of parallel processing and reconfigurable computing.