基于线扫描的VLSI版图几何验证核心算法的固化

ＶＬＳＩ集成度的飞速提高使设计过程复杂化，也对版图验证工具的处理能力与性能提出更高的要求。将版图验证的核心算法固化在专用硬件上，是一类非常有效的方法。本文提出了一种在版图验证算法中得到广泛运用的线扫描算法的硬件实现方法，利用有限状态机和流水线结构兼顾算法的顺序性和硬件的并行度，并通过近似的直接处理ＰＣＩ／Ｏ数据流提高处理大批量数据的能力。系统以一块ＰＣ接口板的形式实现。测试结果表明了约５０倍的加速比。

Hardware Implementation of Line-scan Based Mask Verification Algorithm

The aim of this work is to accelerate VLSI mask checking by transforming the linescan algorthm into a firmware implementation architecture.The firmware is impleniented by the structures of finite state machine and pipeline,and can be viewed as directly interpreting a sorted stream of possibly oblique edges which comes from PC I/O ports.Simulations of this firmware implementation yield speedups of approximate 50 times.