| 一种基于循环ADC结构的可配置Pipeline ADC系统设计 |
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| 引用本文： | 吴毅强, 吴金, 汪少康, 姚建楠,. 一种基于循环ADC结构的可配置Pipeline ADC系统设计[J]. 电子器件, 2007, 30(6): 2069-2072 |
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| 作者姓名： | 吴毅强 吴金 汪少康 姚建楠 |
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| 作者单位： | 东南大学IC学院,南京,210096;东南大学IC学院,南京,210096;东南大学IC学院,南京,210096;东南大学IC学院,南京,210096 |
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| 摘 要： | 通过对Pipeline ADC系统的精度和工作频率可配置原理进行探讨,提出了一种新颖的精度和工作频率可配置Pipeline ADC设计理念,并对系统和子模块进行了设计.可配置的Pipeline ADC的精度可配置在8/10/12bit,工作频率可配置在10/20/40MHz.考虑电路中的增益有限性等因素的影响,使用Matlab对系统建模并仿真.系统仿真结果表明,可配置的Pipe-lineADC系统能够达到满意的SNR、有效位数等性能指标要求.
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| 关 键 词： | 循环 可配置 Pipeline ADC 系统仿真 |
| 文章编号： | 1005-9490(2007)06-2069-04 |
| 修稿时间： | 2007-04-04 |
Reconfigurable Pipeline ADC Design Based on Cyclic ADC Architecture |
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| WU Yi-qiang,WU Jin,WANG Shao-kang,YAO Jian-nan. Reconfigurable Pipeline ADC Design Based on Cyclic ADC Architecture[J]. Journal of Electron Devices, 2007, 30(6): 2069-2072 |
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| Authors: | WU Yi-qiang WU Jin WANG Shao-kang YAO Jian-nan |
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| Affiliation: | College of Integrated Circuits; Southeast University; Nanjing 210096; China |
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| Abstract: | This paper discusses the principle of reconfigurable pipeline ADC as an efficient solution for the ADC design in high data-rate multi-standard radio, and proposes a new reconfigurable pipeline ADC architecture based on cyclic ADC. The ADC has configures with 8/10/12 bit resolution and 10/20/40 MHz sampling frequency.Considered the errors of real circuit,the Matlab simulation result indicates that the system is effective. |
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| Keywords: | cyclic reconfigurable pipeline ADC system simulation |
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