Operation of a 100-bit, 2.6 µm bubble shift register

Complete circuit operation for a small 100-bit serial shift register memory with a 10.6 μm period fabricated on a garnet wafer using electron beam lithography and single level all-permalloy technology is reported. Overall circuit operation including generation, propagation, and detection was achieved with a 6 Oe bias margin using a 1 kHz rotating field. Although the circuit design and fabrication techniques were not optimized, we believe that this is the first published report of complete circuit operation for a single level device with bubbles as small as 2.6 μm. The performance of two different types of chevron expander detectors and two different generators was evaluated and circuits combining disk generators with herringbone detectors were found to provide the best overall operating margin. At low speeds (～5 Hz) high-bias failures were caused by failure of the domains to strip out fully in the detector while the low bias limit was determined by the introduction of spurious bubbles into the track near the generator.