一种用单端口SRAM构成的FIFO的ASIC设计

提出了一种基于单端口SRAM的FIFO电路。此模块电路应用于视频图像处理芯片中，完成同步经过处理后产生相位差的亮度Y信号和色度U，V信号的功能。电路的逻辑控制部分用Verilog硬件描述语言作RTL描述设计，存储器电路用Memory Compiler编译生成的SRAM。利用NC—Sim作了仿真测试，实现了视频信号同步功能，在不增大存储器总容量的情况下完成了和用双端口SRAM构成的FIFO电路相同的功能。应用本电路的芯片已顺利完成了流片。

ASIC Design of an FIFO Involving Single Port SRAM

Presents a circuit of FIFO involving single port SRAM.The module circuit is used in video image process chip,achieving the function of synchronizing luminance Y signal and chroma U,V signals.The logic controling circuit is described using Verilog HDL language,the memory circuit is SRAM produced by memory compiler.Adopts NC-Sim to simulate and test,achieving the function of synchronizing video signals,achieving the same function as the FIFO of dual port SRAM with the same area.The chip including the FIFO has been tapeout successfully.