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CORDIC算法的FPGA与DSP实现的优劣分析
引用本文:王琦,栾铸徵.CORDIC算法的FPGA与DSP实现的优劣分析[J].舰船电子对抗,2012(5):43-46.
作者姓名:王琦  栾铸徵
作者单位:船舶重工集团公司723所
摘    要:介绍了坐标旋转数字计算机(CORDIC)的算法原理,分析了算法中旋转迭代次数、操作数位宽与精度的关系,在现场可编程门阵列(FPGA)芯片和数字信号处理器(DSP)芯片上用全流水、高并行结构分别实现了旋转模式下的CORDIC算法,并将两者的精度、时间效率、空间效率的优劣进行比较。结果表明,DSP数值精度比FPGA高且设计更灵活,可移植性更强;而FPGA速度远远快于DSP,消耗硬件资源更少。

关 键 词:坐标旋转数字计算机  现场可编程门阵列  数字信号处理器  流水线结构

Advantages and Disadvantages Analysis of FPGA and DSP Realization of CORDIC Algorithm
WANG Qi,LUAN Zhu-zheng.Advantages and Disadvantages Analysis of FPGA and DSP Realization of CORDIC Algorithm[J].Shipboard Electronic Countermeasure,2012(5):43-46.
Authors:WANG Qi  LUAN Zhu-zheng
Affiliation:(The 723 Institute of CSIC,Yangzhou 225001,China)
Abstract:This paper introduces the theory of coordinate rotation on digital computer(CORDIC) algorithm,analyzes the relationship between rotating iteration times,operand bit width and precision of the algorithm,realizes the CORDIC algorithm in the rotating mode using full-in-line and high parallel structure based on field-programmable gate array(FPGA) chip and digital signal processor(DSP) chip respectively,and compares both of the advantages and disadvantages of the precision,time efficiency and space efficiency.Results indicate that the numerical value precision of DSP chip is better than FPGA chip,and the design is more flexible,transplantable performance is stronger;but the processing speed of FPGA chip is faster than DSP chip,and FPGA chip consumes much less hardware resource.
Keywords:coordinate rotation on digital computer  field-programmable gate array  digital signal processor  stream-line structure
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