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资源有限FPGA的多通道时间-数字转换系统
引用本文:吴军,王海伟,郭颖,洪光烈,何志平,徐卫明,舒嵘. 资源有限FPGA的多通道时间-数字转换系统[J]. 红外与激光工程, 2015, 44(4): 1208-1217
作者姓名:吴军  王海伟  郭颖  洪光烈  何志平  徐卫明  舒嵘
作者单位:1.中国科学院上海技术物理研究所 空间主动光电技术与系统实验室,上海 200083
基金项目:国家科技支撑计划课题-机载激光雷达和高光谱成像仪组合系统(2012BAH34B02)
摘    要:基于Xilinx XC2V3000芯片设计了一种应用于星载多通道快速激光三维成像雷达中的抗辐照增强型时间-数字转换(Time-to-Digital Converter, TDC)系统.单板2片FPGA内实现了16通道高精度时间间隔测量.采用了多延时链冗余结构,每个测时通道由3个物理测时链路组成,最后通过三模冗余增强抗单粒子翻转能力.并应用了通道均匀性校准修正技术,解决了多通道测时均匀性问题.实验结果表明,系统测时精度达到62.9 ps,通道一致性较好,满足激光雷达三维成像要求,同时该技术方案具有低功耗、轻量化等特点.

关 键 词:激光三维成像雷达   时间-数字转换系统   空间应用   资源有限   三模冗余
收稿时间:2014-08-05

Resources-limited FPGA based-multi-channel TDC system
Affiliation:1.Laboratory of Space Active Electro-Optical Technology and Systems,Shanghai Institute of Technical Physics,Chinese Academy of Sciences,Shanghai 200083,China
Abstract:Based on Xilinx XC2V3000 chip, a multi-channel irradiation resistance enhanced (Time-to-Digital Converter, TDC) system was designed. 16-channel high-precision time measurement was achieved within 2 FPGAs in a single board. With multi-redundant delay-chain structure, each measuring channel consisting of three physical timing links, and the anti-SEU ability was enhanced by triple modular redundancy. The channel uniformity calibration correction technology was applied to solve the multi-channel uniformity issues. Experimental results prove that the system meets the requirements of a 3D imaging laser radar, with an accuracy of 62.9 ps and a good uniformity. Meanwhile, the technical solution provides has a character of low power consumption, light weight etc.
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