An accurate method of determining MOSFET gate overlap capacitance

A new method to determine gate overlap capacitance from measurements in the inversion regime of MOSFET operation is reported. Measured overlap capacitance, for submicron LDD devices, using the new method is compared with the conventional method of determining overlap capacitance from accumulation and with the reverse-biased source/drain junction method. Since transistors are rarely in accumulation during the normal operation of digital circuits, the traditional method of overlap capacitance extraction in accumulation is inappropriate. Many digital circuits operate primarily in inversion; using our new method these circuits can be modeled more accurately.