Accurate estimation of statistical parametric variation in microelectronic test structures

Advanced technologies of microelectronic device fabrication need accurate determination of process parameters and their analysis. Test structures which represent individual process steps are incorporated in the design. Independent measurements can be carried out on these structures and the information is used as a feedback in order to achieve perfection at different stages of fabrication. This note presents an algorithm for analysis of measurement data and identification of defective sites on the wafer leading to an accurate yield analysis.