基于改进最小二乘支持向量机的 FPGA 焊点失效故障评估方法研究

针对现有现场可编程逻辑门阵列(FPGA)焊接点失效故障评估方法存在的无法提供准确的信息、样本数据少、时效性不高等问题,提出结合遗传算法(GA)改进最小二乘支持向量机(GA-LS-SVM)的FPGA焊接点失效故障评估方法。建立SJ BIST测试模型,选择合适的外接小电容,通过改变不同工作频率下可变电阻的大小模拟焊点阻值,获得基于小电容电压变化的故障数据,建立电容低电平的持续时间、电容测试工作频率和焊接点电阻值的三维数据图;最后利用遗传算法优化的最小二乘支持向量机对所得到的数据进行状态评估,由三维数据图可知,健康的FPGA焊接点与断裂的FPGA焊接点在低电平的持续时间具有明显差异。仿真实验结果表明,所提出的GA-LS-SVM方法焊接点健康状态等级分类的总准确率达到97.2%,相较于BP神经网络、标准SVM及LS-SVM方法分别提高了17.9%、13%及7.2%。

Research on FPGA solder joint failure evaluation method based onimproved least square support vector machine

Aiming at the problems in the current FPGA welding point failure assessment methods, such as the inability to provideaccurate information, lack of sample data and low timeliness, combined with genetic algorithm (GA), an improved FPGA welding pointfailure assessment method based on the least square support vector machine (GA-LS-SVM) was proposed. Establish the SJ BIST testmodel, select the appropriate small external capacitor, simulate the welding spot resistance value by changing the variable resistor size atdifferent operating frequencies, obtain the fault data based on the voltage change of small capacitor, and establish the three-dimensionaldata graph of the duration of capacitor low level, capacitor test working frequency and welding point resistance value; Finally usinggenetic algorithm to optimize the least squares support vector machine (SVM) to state evaluation of the obtained data, according to thethree-dimensional data graph, there is a significant difference in the duration of low-level between healthy FPGA solder joints and brokenFPGA solder joints. The simulation results show that the proposed GA-LA-SVM method has an overall accuracy rate of 97. 2%, which is17. 9%, 13% and 7. 2% higher than BPNN, standard SVM and LS-SVM methods.