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基于可配置处理器的SoC系统级设计方法
引用本文:邵洋,单睿,张铁军,侯朝焕. 基于可配置处理器的SoC系统级设计方法[J]. 计算机工程与应用, 2006, 42(26): 96-98
作者姓名:邵洋  单睿  张铁军  侯朝焕
作者单位:中国科学院声学研究所,北京,100080;中国科学院研究生院,北京,100039;中国科学院声学研究所,北京,100080
摘    要:论文对一种经过改进的SoC系统级快速设计方法进行了介绍和研究。该设计基于可配置处理器核,在设计早期阶段对SoC系统快速建模,以获得针对具体应用算法的最优性能。同时,利用软硬件协同设计方法,得到硬件结构模型和软件开发平台。实验结果表明,该方法不仅灵活,而且设计周期短,减少了设计工作量。

关 键 词:片上系统SoC  系统级设计  软硬件协同设计  指令集扩展
文章编号:1002-8331-(2006)26-0096-03
收稿时间:2005-12-01
修稿时间:2005-12-01

A New System Level Methodology for SoC Design Based on Reconfigurable Processor
SHAO Yang,SHAN Rui,ZHANG Tie-jun,HOU Chao-huan. A New System Level Methodology for SoC Design Based on Reconfigurable Processor[J]. Computer Engineering and Applications, 2006, 42(26): 96-98
Authors:SHAO Yang  SHAN Rui  ZHANG Tie-jun  HOU Chao-huan
Affiliation:institute of Acoustics,Chinese Academy of Sciences, Beijing 100080;Graduate University of Chinese Academy of Sciences,Beijing 100039
Abstract:An improved methodology to design SoC system based on configurable processor Xtensa is presented in this paper.The most important aim of this method is to model a retargetable processor model at the early stage of the system level design,so as to get optimum results for specific applications.Also it uses hardware/software co-design for hardware architecture model and software developing platform.Moreover,this flexible design methodology helps to speed up time-to-market and ease manual work.
Keywords:SoC  system level design  HW/SW co-design  instruction set extension
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