| 基于FPGA的I2C总线设计 |
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| 引用本文： | 张家会,熊先越,曾丽珍.基于FPGA的I2C总线设计[J].光通信技术,2011,35(9):40-41. |
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| 作者姓名： | 张家会 熊先越 曾丽珍 |
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| 作者单位： | 1. 中国电子科技集团公司第三十四研究所,广西桂林,541004
2. 桂林电子科技大学研究生学院,广西桂林,541004 |
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| 摘 要： | 以I2C总线协议为根据,提出一种采用FPGA,通过有限状态机来模拟实现I2C总线接口的方法.主要内容包括简述I2C总线的原理；介绍用FPGA中有限状态机开发I2C总线模块时的设计思想和实现过程.通过对SAA7113的初始化验证了该方案的正确性.
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| 关 键 词： | I2C总线 FPGA 有限状态机。 |
Design of I~2C-bus based on FPGA |
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| ZHANG Jia-hui,XIONG Xian-yue,ZENG Li-zhen.Design of I~2C-bus based on FPGA[J].Optical Communication Technology,2011,35(9):40-41. |
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| Authors: | ZHANG Jia-hui XIONG Xian-yue ZENG Li-zhen |
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| Affiliation: | ZHANG Jia-hui1,XIONG Xian-yue1,ZENG Li-zhen2(1.China Electronics Technology Group Corporation,No.34 Research Institute,Guilin Guangxi 541004,China,2.School of graduate studies,Guilin University of Electronic Technology,China) Guilin University of Electronic Technology,China) |
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| Abstract: | To pass Finite State Machine simulates and achieve I2C-Bus interface by FPGA,on base of I2C-Bus interface protocol.This paper mostly content introduces the basic principle of I2C-Bus of recapitulating and Finite State Machine depend on FPGA investigate the I2C-bus module's idea of design and process of realization.By way of initialization of SAA7113 validates the right of the blue print. |
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| Keywords: | I2C-Bus FPGA finite state machine |
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