Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor |
| |
| Authors: | J H Tsai W Ch Liu D F Guo Y Ch Kang Sh Y Chiu W Sh Lour |
| |
| Affiliation: | (1) Department of Electronic Engineering, National Kaohsiung Normal University, 116 Ho-ping 1st Road, Kaohsiung, 802, Taiwan, China;(2) Institute of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, 1 University Road, Tainan, Taiwan, China;(3) Department of Electronic Engineering, Air Force Academy, Kaohsiung, Taiwan, China;(4) Department of Electrical Engineering, National Taiwan Ocean University, 2 Peining Road, Keelung, Taiwan, China |
| |
| Abstract: | The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the
valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as
thin p
+-InGaAs emitter layer between p-InP confinement and n
+-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector
offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset
voltage of 54 mV have been achieved.
The text was submitted by the authors in English. |
| |
| Keywords: | |
| 本文献已被 SpringerLink 等数据库收录！ |
|
