A 16-Mb MRAM featuring bootstrapped write drivers |
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| Authors: | Gogl D Arndt C Barwin JC Bette A DeBrosse J Gow E Hoenigschmid H Lammers S Lamorey M Yu Lu Maffitt T Maloney K Obermaier W Sturm A Viehmann H Willmott D Wood M Gallagher WJ Mueller G Sitaram AR |
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| Affiliation: | IBM/Infineon MRAM Dev. Alliance, Hopewell Junction, NY, USA; |
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| Abstract: | A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-/spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42/spl mu/m/sup 2/ 1-transistor 1-magnetic tunnel junction (1T1MTJ) cell, measures 79 mm/sup 2/ and features a /spl times/16 asynchronous SRAM-like interface. The paper describes the cell, architecture, and circuit techniques unique to multi-Mb MRAM design, including a novel bootstrapped write driver circuit. Hardware results are presented. |
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