用于测量数字电路抖动的波形扩展方法

为了解决当下无法实时地对芯片内高频数字信号抖动进行精确测量等问题，本文提出了一种可以将高频数字方波信号低频化的扩展器电路结构。该扩展器对高频数字信号的边沿进行采样和输出，在完整保留信号抖动的同时将输入的高频数字信号实时展开成周期为预设值的低频方波信号。晶体管级的仿真实验和MSI（Medium-Scale Integration，中规模集成电路）板级验证表明：该方法能扩大信号相邻边沿的时间间隔，同时保留原信号的抖动特性，可以用来测量频率达数吉赫兹的高频数字信号的抖动且测量精度非常高（误差小于0.7%）。该扩展器结构简单，可集成于芯片内部用以实时且精准地测量片内高频数字信号的抖动。

Waveform expansion method for measuring digital circuit jitter

In order to solve the problem that the jitter value of the high-frequency digital signal inside the chip is difficult to measure accurately, this paper proposes an expander circuit structure that can reduce the frequency of the high-frequency digital square wave signal. The expander samples and outputs the edge of the high-frequency digital signal, and expands the input high-frequency digital signal into a low-frequency square wave signal with a preset period in real time while completely preserving the signal jitter. Transistor-level simulation experiments and MSI (Medium-Scale Integration, medium-scale integrated circuit) board-level verification show that this method can expand the time interval between adjacent edges of the signal, while preserving the jitter characteristics of the original signal, and can be used to measure frequencies up to several The jitter of high-frequency digital signals in gigahertz and the measurement accuracy is very high (error less than 0.7%). The expander has a simple structure and can be integrated inside the chip to quickly and accurately measure the jitter of the high-frequency digital signal on the chip.