GCC的流水冲突识别器和并行调度器

由于超长指令字处理器通常都有多级流水线和复杂的资源使用限制,如何准确地描述处理器的流水线模型,快速地判断是否存在资源冲突并不是个简单地任务。文章介绍GCC新引入的正则表达式语法的流水线描述机制。在将GCC移植到笔者所开发的SuperV芯片的过程中,利用该机制对SuperV芯片的流水线结构和资源使用限制进行详尽地描述,启动了GCC的指令级并行调度。通过并行调度,测试程序的性能提高了大约6%—35%。

Pipeline Hazard Recognizer and Parallel Scheduler in GCC

For the VLIW processor implementation of multiple pipelines and complex resource usage restrictions,the task that is to accurately describe the processor's pipelining model and quickly detect the resource hazard is not easy.This paper decribes a method with the format of regular expression that GCC newly incorporates to decrible the pipeline.During the process of porting GCC to the developed SuperV chip,it uses this method to make a complete decription of the pipelining structure and resource usage restrictions of SuperV chip.It activates the ability of parallel instruction scheduling of GCC.After parallel instruction scheduling,the performance of the test programs enhance about 6%～35%.