Highly efficient enhancement-mode power heterojunction FET withmultilayer cap and doped recess structure for 3.5-V digital cellularphones |
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Authors: | Bite Y Iwata N |
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Affiliation: | Kansai Electron. Res. Labs., NEC Corp., Shiga; |
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Abstract: | This paper describes the highly efficient 950-MHz power performance of an enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET) under 3.5-V operation for personal digital cellular (PDC) phones. The device has a multilayer cap and a double recess structure in which a highly doped GaAs layer is employed beneath a wide recess for reducing on-resistance (R0n) and increasing maximum drain current (Imax). A developed device exhibited 1.6 Ω·mm R0n and 400 mA/mm Imax with a threshold voltage of +0.18 V. Under single 3.5-V operation, the 24-mm HJFET, with less than 50 μA drain current at a gate-to-source voltage of 0.0 V, exhibited 1.15 W output power and 67.6% power-added efficiency (PAE) with an adjacent channel leakage power of -48.4 dBc at 50 kHz off-center frequency |
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