| 基于FPGA及PC机的级联数字抽取滤波技术 |
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| 引用本文： | 柏晓锁,施春荣. 基于FPGA及PC机的级联数字抽取滤波技术[J]. 雷达与对抗, 2009, 0(3): 41-43 |
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| 作者姓名： | 柏晓锁 施春荣 |
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| 作者单位： | 南京船舶雷达研究所,南京210003 |
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| 摘 要： | 介绍了一种基于FPGA及PC机的级联数字抽取滤波技术。设计了多个数字抽取滤波器的级联匹配方法,对各级数字抽取滤波器进行了仿真。通过将FPGA与PC机紧密结合的方式,使FPGA和PC发挥各自的优势,在硬件规模不太复杂的条件下实现了高速宽带数据流大规模抽取窄带滤波的功能。
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| 关 键 词： | FPGA PC FIR 级联 抽取 滤波 |
The cascaded digital extraction filtering technology based on FPGA and PC |
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| BAI Xiao-suo,SHI Chun-rong. The cascaded digital extraction filtering technology based on FPGA and PC[J]. Radar & Ecm, 2009, 0(3): 41-43 |
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| Authors: | BAI Xiao-suo SHI Chun-rong |
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| Affiliation: | (Nanjing Marine Radar Institute ,Nanjing 210003 ) |
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| Abstract: | The cascaded digital extraction filtering technology based on FPGA and PC is introduced, whose cascaded matched method is designed and simulated. With the combination and advantages of FPGA and PC as well as the non-complicated hardware scale, the large-scale extraction of narrow-band filtering based on high-speed wideband data flow is carried out. |
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| Keywords: | FPGA PC FIR cascade extraction filtering |
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