| 基于FPGA实现PN码快速捕获方案的设计 |
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| 引用本文： | 宋依青,王允龙.基于FPGA实现PN码快速捕获方案的设计[J].通信技术,2009,42(10):75-78. |
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| 作者姓名： | 宋依青 王允龙 |
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| 作者单位： | 1. 常州工学院计算机信息工程学院,江苏,常州,213002
2. 淮阴工学院电子信息工程系,江苏,淮安,223001 |
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| 摘 要： | 文章基于离散时间信号处理的分析方法，对多普勒频移影响PN码的性能进行了讨论。详细分析了部分数字相关器与FFT结合的频响特性并进行了系统仿真。在此基础上，提出了对存在较大多普勒频移的长伪随机码系统，采用FPGA实现部分数字相关器与FFT频率校正技术相结合的伪码捕获算法，实现较短时间捕获PN码的方案。
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| 关 键 词： | PN码快捕 数字相关 多普勒频移 FPGA |
Fast Capture Scheme of PN Code based on FPGA |
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| SONG Yi-qing,WANG Yun-long.Fast Capture Scheme of PN Code based on FPGA[J].Communications Technology,2009,42(10):75-78. |
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| Authors: | SONG Yi-qing WANG Yun-long |
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| Affiliation: | SONG Yi-qing, WANG Yun-long ((1)Colloge of Computer ＆ Information Engineering, Changzhou Institute of Technology, Changzhou Jiangsu 213002, China： (2)Department of Electronics ＆ Information Engineering, Huaiyin Institute of Technology, Huaian Jiangsu 223001, China) |
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| Abstract: | The article, based on analysis method of the discrete time signal processing, discusses the PN code performance affected by the Doppler frequency deviation. The working principle of digital correlator and the frequency response characteristics in combining partial digital correlator with FFT is analyzed and simulated. The paper proposes the FPgA-based implementation scheme for fast capture of PN code in the short time by combining the partial digital correlator with FFT in the long pseudo-random code system with large Doppler frequency deviation. |
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| Keywords: | FPGA |
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