浮点开方运算单元的电路设计

文章提出了一种基于逐位循环开方算法,"四位一开方"的浮点开方运算单元的电路设计方案,使限制周期时间的循环迭代部分的门级数降低到14级。按14级门延时为周期时间计算,完成一个IEEE单、双精度浮点数的开方运算分别需要15和29周期。同时,文章对目前开方运算所采用的两类主要的算法-逐位循环开方算法和牛顿－莱福森迭代开方算法进行了描述,其中包括数的冗余表示等内容。

The Circuit Design of Floating-Point Square Root Unit

This paper presents a scheme of circuit design of floating－point square root unit,which is based on the ″Four－bits per Iteration″ square root method included in the digit－recurrence algorithms．In this scheme,it reduces the number of gate level in the recurrence part that restricts the cycle time down to 14．Accounting 14－level gates in a latency as one cycle time,the circuit can finish the computation of square root of the IEEE754 single or double format floating－point numbers in 15 cycles and 29 cycles respectively．Moreover This paper describes two main square root algorithms－digit－recurrence algorithm and Newton－Raphson algorithm,which include the redundant representation of numbers．