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Low-power wake-up receiver with subthreshold CMOS circuits for wireless sensor networks
Authors:Kazuhiro Takahagi  Hiromichi Matsushita  Tomoki Iida  Masayuki Ikebe  Yoshihito Amemiya  Eiichi Sano
Affiliation:1. Research Center for Integrated Quantum Electronics, Hokkaido University, Sapporo, 060-8628, Japan
2. Graduate School of Information Science and Technology, Hokkaido University, Sapporo, 060-0814, Japan
Abstract:We developed a wake-up receiver comprised of subthreshold CMOS circuits. The proposed receiver includes an envelope detector, a high-gain baseband amplifier, a clock and data recovery (CDR) circuit, and a wake-up signal recognition circuit. The drain nonlinearity in the subthreshold region effectively detects the baseband signal with a microwave carrier. The offset cancellation method with a biasing circuit operated by the subthreshold produces a high gain of more than 100 dB for the baseband amplifier. A pulse-width modulation (PWM) CDR drastically reduces the power consumption of the receiver. A 2.4-GHz detector, a high-gain amplifier and a PWM clock recovery circuit were designed and fabricated with 0.18-μm CMOS process with one poly and six metal layers. The fabricated detector and high-gain amplifier achieved a sensitivity of ?47.2 dBm while consuming only 6.8 μW from a 1.5 V supply. The fabricated clock recovery circuit operated successfully up to 500 kbps.
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