| 数字相关器及其VHDL设计 |
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| 引用本文： | 焦冬莉. 数字相关器及其VHDL设计[J]. 电子工程师, 2007, 33(10): 24-25 |
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| 作者姓名： | 焦冬莉 |
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| 作者单位： | 太原工业学院,山西省太原市,030008 |
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| 摘 要： | 利用VHDL(甚高速集成电路硬件描述语言)对硬件进行设计可简化电路设计工作。在数字通信的数据传输过程中,需要保持数据在传输过程中的同步,因此要在数据传输过程中插入帧同步字并用数字相关器对帧同步字进行检测,从而有效地避免发送数据与接收数据在传输过程中出现的异步问题。以10交叉码作为帧同步字的主要格式,基于FPGA进行了数字相关器的VHDL设计。
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| 关 键 词： | 数字相关器 VHDL 帧同步字 |
| 修稿时间： | 2007-03-26 |
Digital Correlation Device and Design of VHDL |
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| JIAO Dongli. Digital Correlation Device and Design of VHDL[J]. Electronic Engineer, 2007, 33(10): 24-25 |
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| Authors: | JIAO Dongli |
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| Affiliation: | Taiyuan University of Technology, Taiyuan 030008, China |
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| Abstract: | Using VHDL can greatly simplify the design of electronic circuits.In the process of data transmission,the most important is data synchronous transmission,it needs insert frame synchronizing word in the data and testing it with digial correlation device in the process of data transmission.Using digital correlation device test frame synchronizing word can effectivly avoid asynchronous transmission.In this paper digial correlation device is designed with VHDL based on FPGA,the mode of frame synchronizing word is 10 cross code. |
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| Keywords: | digital correlation device VHDL frame synchronizing word |
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