Decrease of gate oxide dielectric constant in tungsten polycidegate processes |
| |
Authors: | Cherng YC Wulu H-C Yang FH Lu CY |
| |
Affiliation: | Electron. Res. & Service Organ., Ind. Technol. Res. Inst., Hsin-chu; |
| |
Abstract: | The gate oxide thickness for tungsten (W) polycide gate processes is studied, with tungsten silicide (WSix) deposited either by chemical vapor deposition (CVD) or sputtering. For WSix deposited by CVD, it is found that the effective thickness of gate oxide as determined by CV measurement increases in all cases if the annealing temperature is 900°C or higher. However, high-resolution transmission electron microscopy (TEM) measurement indicates that the physical thickness does not change after a 900°C anneal. In this case, the dielectric constant of the gate oxide decreases by 7%. As the annealing temperature increases to 1000°C, CV and TEM measurements give the same thickness and the decrease of the dielectric constant disappears. In contrast, for WSix film deposited by sputtering, annealing at 900°C has no effect on the gate oxide thickness as measured by CV and TEM |
| |
Keywords: | |
|
|