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Recent advances in modeling the underfill process in flip-chip packaging
Authors:JW Wan  DJ Bergstrom
Affiliation:a Guangzhou University, China
b Department of Mechanical Engineering, University of Saskatchewan, 57 Campus Dr., Saskatoon, Sask., Canada S7N 5A9
Abstract:Flip-chip underfill process is a very important step in the flip-chip packaging technology because of its great impact on the reliability of the electronic devices. In this technology, underfill is used to redistribute the thermo-mechanical stress generated from the mismatch of the coefficient of thermal expansion between silicon die and organic substrate for increasing the reliability of flip-chip packaging. In this article, the models which have been used to describe the properties of underfill flow driven by capillary action are discussed. The models included apply to Newtonian and non-Newtonian behavior with and without the solder bump resistance for the purpose of understanding the behavior of underfill flow in flip-chip packaging.
Keywords:Model  Underfill flow  Flip-chip packaging
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