Amdahl定律在层次化片上多核处理器中的扩展

层次化片上多核处理器以紧耦合的多个核构成超节点,对访存和片上通信的局部性有良好支撑,能有效地缓解片上多核中数据通信带来的通信开销.在关于多核处理器的Amdahl开销/性能模型已有的研究基础上,引入片上数据通信延迟作为Amdahl任务计算开销的新元素,构建了层次化片上多核处理器的Amdahl加速比扩展模型.基于该扩展模型,就层次化片上多核处理器的加速比与超节点配置的关系问题展开研究.模拟分析发现,要获得良好的加速比性能,层次化片上多核处理器需要在超节点数目与超节点的大小(超节点内核的个数)之间作仔细的权衡;对于给定核数目的层次化片上多核处理器,使系统性能最优的超节点大小往往出现在中间某个值而不是最大或者最小,并且该值随着系统规模的变化会发生相应的变化.

Revisiting Amdahl's Law in the Hierarchical Chip Multicore Processors

Hierarchical chip multicore processors(HCMPs) can well support the memory reference and on-chip communications locality through supernodes,each of which consists of several tightly coupled processing cores,and thus efficiently reduce the data communications latency.This paper revisits the previous cost/performance Amdahl model of the multicore processors,and make some extentions to account for the non uniform data communications latency of the HCMP architectures.Through those extentions,this paper investigates the relationship between the performance speedup and the size of the supernodes,which means the number of cores in a supernode in hierarchical chip multicore processors,and some important design rules are maintained.Simulation results reveal that to maintain a better Amdahl speedup,the HCMP architecture designers should carefully deal with the size of the supernode and the number of supernodes in an HCMP.Given the overall number of processing cores in an HCMP,the configuration of the supernode that makes the HCMP the optimal performance is with the intermediate number of middle-sized supernodes,and the optimal size of the supernode also varies with the overall cores in the HCMP.During the design of a specific hierarchical chip multicore processor,the proposed performance model can be utilized to help the designers make a better decision.