一种面向存算的高速字线驱动电路

在非易失性存算芯片(CIM)中,大规模阵列的栅极等效电容以及远距离传输导线的等效电容严重限制了字线驱动电路(WLDC)的切换速度.非易失性存算器件工作所需的多电压域的压差已远超字线驱动电路中单管耐压范围.文章提出了一种面向存算的高速字线驱动电路,结合阵列的工作原理,采取多级预处理电压控制方法,将多电压域多种高压进行可选...

A High Speed Word Line Drive Circuit for Compute-in-Memory

In non-volatile compute-in-memory (CIM) chips, the gate equivalent capacitance of large-scale array and the equivalent capacitance of long-distance transmission line severely restricted the switching speed of word line drive circuit (WLDC). The different voltage of multi-voltage range required by the nonvolatile CIM device was much larger than the withstand voltage of single transistor in the WLDC. Therefore, this paper proposed a high speed WLDC for CIM. By combining with the working principle of array, a multi-stage pre-processing voltage control method was adopted to transmit a variety of high voltages in multiple voltage domains in a selective hierarchical manner, which could greatly reduce the propagation delay. In addition, a clamp voltage divider structure was adopted to reduce the voltage drop of single device in the WLDC, which could solve the voltage withstand and high voltage switching problems of the WLDC. Simulation results showed that the circuit could convert the 1.2 V input of 100 MHz frequency into the high voltage output. The range of a single high speed WLDC output voltage could reach -10 V to 10 V, and the intrinsic delay was 1.4 ns. When the load was 5 pF, the transmission delay was 8.9 ns.