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功率集成电路TID加固环栅器件研究现状综述
引用本文:罗萍,吴昱操,范佳航,张致远,冯皆凯,赵忠.功率集成电路TID加固环栅器件研究现状综述[J].微电子学,2023,53(6):957-964.
作者姓名:罗萍  吴昱操  范佳航  张致远  冯皆凯  赵忠
作者单位:电子科技大学 电子薄膜与集成器件全国重点实验室, 成都 611731;电子科技大学 重庆微电子产业技术研究院, 重庆 400060
基金项目:重庆市自然科学基金资助项目(CSTB2023NSCQMSX0153)
摘    要:总结了标准工艺下功率集成电路中总剂量辐射(TID)加固环栅MOS器件与环栅功率器件的研究现状,归纳了不同结构形态的环栅器件的性能优劣,推荐8字形环栅MOS器件、华夫饼功率器件及回字形LDMOS器件结构用于功率集成电路的TID加固设计。同时,阐述了现有环栅MOS器件等效W/L的建模情况,提出保角变换是环栅MOS器件等效W/L精确建模的重要方法,最后还给出了环栅器件建库的基本流程。

关 键 词:总剂量辐射加固    环栅MOS器件    环栅功率MOS    等效W/L建模    环栅器件建库
收稿时间:2023/10/16 0:00:00

An Overview of the Research on TID Radiation-Hardened Enclosed Layout Devices for Power Integrated Circuits
LUO Ping,WU Yucao,FAN Jiahang,ZHANG Zhiyuan,FENG Jiekai,ZHAO Zhong.An Overview of the Research on TID Radiation-Hardened Enclosed Layout Devices for Power Integrated Circuits[J].Microelectronics,2023,53(6):957-964.
Authors:LUO Ping  WU Yucao  FAN Jiahang  ZHANG Zhiyuan  FENG Jiekai  ZHAO Zhong
Affiliation:State Key Lab.of Elec.Thin Films and Integr.Dev., Univ.of Elec.Sci.and Technol.of China, Chengdu 610054, P.R.China;Chongqing Institute of Microelec.Industry Technol., Univ.of Elec.Sci.and Technol.of China, Chongqing 400060 P.R.China
Abstract:The researches on total ionizing dose radiation-hardened enclosed layout MOS and enclosed layout power device in power integrated circuits under standard processes were summarized. The advantage and disadvantage performances of different structural forms of radiation-hardened enclosed layout devices was analyzed. 8-shaped enclosed layout MOS, waffle typed layout power MOS and rectangular-shape LDMOS were recommended in power integrated circuit design. The modeling of equivalent W/L of existing radiation-hardened enclosed layout MOS devices were elaborated. Conformal transformation was an important way for accurate modeling of equivalent W/L of enclosed layout MOS devices. Finally, the basic process for building a library of enclosed layout devices was provided.
Keywords:total ionizing dose radiation-hardened  enclosed layout MOS device  enclosed layout power MOS  equivalent W/L modeling  building library of enclosed layout device
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