Zero-voltage-switching PWM inverter for high-frequency DC-AC powerconversion

A zero-voltage-switching (ZVS) three-phase pulse width modulated (PWM) inverter which uses a parallel-resonant DC-link (PRDCL) circuit proposed by J. He and N. Mohan (1989) is examined. The PRDCL circuit is aimed at both providing zero-DC link voltage periods for PWM inverter switchings and imposing minimum DC bus voltage stress to PWM inverters. A simple circuit control scheme and the design formulas are offered. To confirm the circuit theoretical analyses and results, a 50 W ZVS single-phase PWM inverter experimental prototype using the proposed PRDCL circuit was fabricated and tested. The test results have proved the proposed circuit and concept. Power device selections and device stress evaluations are described. A detailed comparison of the proposed PRDCL ZVS inverter system with conventional voltage source PWM inverters is discussed