The secure wavelet transform |
| |
Authors: | Amit Pande Joseph Zambreno |
| |
Affiliation: | (1) Electrical and Computer Engineering, 2215 Coover Hall, Ames, IA 50011, USA |
| |
Abstract: | There has been an increasing concern for the security of multimedia transactions over real-time embedded systems. Partial
and selective encryption schemes have been proposed in the research literature, but these schemes significantly increase the
computation cost leading to tradeoffs in system latency, throughput, hardware requirements and power usage. In this paper,
we propose a light-weight multimedia encryption strategy based on a modified discrete wavelet transform (DWT) which we refer
to as the secure wavelet transform (SWT). The SWT provides joint multimedia encryption and compression by two modifications
over the traditional DWT implementations: (a) parameterized construction of the DWT and (b) subband re-orientation for the
wavelet decomposition. The SWT has rational coefficients which allow us to build a high throughput hardware implementation
on fixed point arithmetic. We obtain a zero-overhead implementation on custom hardware. Furthermore, a Look-up table based
reconfigurable implementation allows us to allocate the encryption key to the hardware at run-time. Direct implementation
on Xilinx Virtex FPGA gave a clock frequency of 60 MHz while a reconfigurable multiplier based design gave a improved clock
frequency of 114 MHz. The pipelined implementation of the SWT achieved a clock frequency of 240 MHz on a Xilinx Virtex-4 FPGA
and met the timing constraint of 500 MHz on a standard cell realization using 45 nm CMOS technology. |
| |
Keywords: | |
本文献已被 SpringerLink 等数据库收录! |
|