高速实时数据采集智能控制器的设计与实现

文章以嵌入式和数据采集技术为基础,研究设计并实现了基于ARM+FPGA体系架构面向高速实时数据采集应用的一种实用新型智能控制器。本文阐述了主处理器ARM最小系统、协处理器FPGA最小系统和ARM与FPGA通信接口等硬件系统技术的实现,以及Linux FPGA字符设备驱动程序开发、协处理器FPGA控制程序和主处理器ARM应用程序设计。智能控制器运用FPGA并行运算处理结构的优势,控制ADC进行高速数据采集。FPGA还可配置成软核处理器-Nios II嵌入式处理器,与ARM构成双核处理器系统。智能控制器通过ARM实现对FPGA的管理控制、实时数据采集和丰富外围接口的通信。

Design and Implementation of Intelligent Controller for the High-speed and Real-time Data Acquisition

On the basis of embedded system and data acquisition technology a practical and new intelligent controller is studied, designed and implemented for the high-speed and real-time data acquisition applications, which is based on ARM＋FPGA architecture.This paper describes the implementation of some hardware technologies such as of the minimum system of host processor ARM, the minimum system of coprocessor FPGA and the communication interface of ARM and FPGA, as well as the development of the driver of the Linux character device of FPGA, the control program of coprocessor FPGA and the application design of main processor ARM. The intelligent controller takes the advantages of the parallel computing processing structure of FPGA to control the ADC carrying out high-speed data acquisition. FPGA can be configured into a soft-core processor-Nios II embedded processor, constituting a dual-core processor system with ARM. The intelligent controller implement the management and control of FPGA, the real-time data acquisition, and the rich peripheral interface communications through ARM.