A new digital background calibration for redundant radix-4 pipelined ADCs by modeling of adaptive filter for linear and nonlinear errors |
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| Affiliation: | 1. Faculty of Mechanical Engineering, Thanthai Periyar Government Institute of Technology, Vellore, Anna University, India;2. Thanthai Periyar Government Institute of Technology, Vellore, Anna University, India;3. Faculty of Mechanical Engineering, Dr. NNCE, Thozhudur, Anna University, India;1. School of Mathematical Sciences, Huaqiao University, Quanzhou 362021, PR China;2. School of Mathematics and Physics, University of Science and Technology Beijing, Beijing 100083, PR China;3. Beijing Center for Scientific and Computing (BJC-SEC), Beijing University of Technology, Beijing 100124, PR China;4. Department of Physics, Blinn College, Bryan, TX 77805, USA;1. Advanced Dynamics and Control Lab, Department of Mechanical Engineering, College of Engineering, Trivandrum, India;2. Department of Mechanical Engineering, College of Engineering, Adoor, India;1. Young Researchers and Elite Club, Karaj Branch, Islamic Azad University, Karaj, Iran;2. Cardiff Metropolitan University, UK;3. Department of Industrial Management, Faculty of Management and Accounting, Karaj Branch, Islamic Azad University, P.O. Box 31485-313, Karaj, Iran |
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| Abstract: | In this paper a new digital background correction and calibration technique for redundant multi-bit pipeline stages is presented. In this method output voltage of each stage in converter is defined as sum of the ideal product and error signal, which error voltage include of linear non-ideal section or first order error and nonlinearity undesired signal or third order error. Linear error is formed by capacitor mismatch, op-amp offset, comparator offset and finite op-amp gain effects. Nonlinear error is deformed the output voltage depend on the nonlinear results of open loop residue amplifier. Correction begins with separately calculation and cancelation of the nonlinear and linear errors respectively. For calibration of each stage at first step, the nonlinear effects in digital output of backend ADC is eliminated and then by digital modeling of first order analog error the influence of this unfavorable signal is diminished from digital equivalent of input voltage. Therefore for cancelation of non-ideal impairment in each stage a digital filter consist of linear and nonlinear channel in digital domain is designed. The first order and third order coefficients of designed digital function are unknown and should by a pertinent method be estimated simultaneously. Adaptive filter are best choose for this method. Simulation results show that INL/DNL parameters of 14-bit radix-4 pipelined converter are improved from 17LSB/3LSB to 0.45LSB/0.41LSB after calibration. The SNDR/SFDR parameters are increased from 30 dB/36 dB to 83 dB/90 dB. |
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| Keywords: | Adaptive filter Capacitor mismatch Multi-bit pipeline stages Nonlinear channel Calibration |
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