| 基于线性扫描算法的TTA编译器优化 |
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| 引用本文： | 刘壮丽,郭炜,魏继增.基于线性扫描算法的TTA编译器优化[J].计算机工程,2010,36(11):58-60. |
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| 作者姓名： | 刘壮丽 郭炜 魏继增 |
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| 作者单位： | 天津大学计算机科学与技术学院,天津,300072 |
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| 基金项目： | 天津市科技支撑计划基金资助重点项目“面向多媒体应用技术的可定制处理器及SOC平台的研发”(08ZCGYGX00400) |
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| 摘 要： | 提出将线性扫描算法用于传输触发体系结构(TTA)编译器的后端优化设计中，实现全局寄存器分配。线性扫描算法的应用使TTA编译器具有生成目标代码质量高、算法的时间和空间复杂度低、易于实现等优点。实验结果表明，该算法在寄存器数目相同，且有大量的变量竞争时具有明显优势。
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| 关 键 词： | 传输触发体系结构 可配置处理器 线性扫描 编译器 全局寄存器分配 |
TTA Compiler Optimization Based on Linear Scan Algorithm |
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| LIU Zhuang-li,GUO Wei,WEI Ji-zeng.TTA Compiler Optimization Based on Linear Scan Algorithm[J].Computer Engineering,2010,36(11):58-60. |
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| Authors: | LIU Zhuang-li GUO Wei WEI Ji-zeng |
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| Affiliation: | (School of Computer Science and Technology, Tianjin University, Tianjin 300072) |
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| Abstract: | This paper presents a compiler’s back-end optimizing design for Transport Triggered Architecture(TTA) processor using linear scan algorithm, the algorithm is used to accomplish global register allocation. The application of this algorithm makes TTA compiler so many advantages, such as the quality of code obtained is high, time and space complexity is low, and implementation is easy. Experimental results show that the advantages of the algorithm are especially obvious when source programs contain large number of variables competing for same number of registers. |
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| Keywords: | Transport Triggered Architecture(TTA) configurable processors linear scan compiler global register allocation |
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