A memory‐in‐pixel reflective‐type LCD using newly designed system and pixel structure |
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Authors: | Masaya Tamaki Yoko Fukunaga Masashi Mitsui Kazuyuki Maeda Masaaki Kabe Yasuyuki Teranishi Takayuki Nakanishi Hideyuki Omori Shuji Hayashi Naoyuki Takasaki Fumitaka Goto Tsutomu Harada |
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Affiliation: | 1. Display System R&D Department, Japan Display Inc., , Tokyo, Japan;2. Panel Design Department 2, Japan Display Inc., , Tokyo, Japan;3. IC Design Group 2, Japan Display Inc., , Tokyo, Japan |
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Abstract: | A 7.03‐in. extended graphics array reflective LCD prototype has been developed by using memory‐in‐pixel (MIP) technologies with a newly designed system and pixel structure. The MIP system comprising a MIP backplane and a display driver has been optimized to reduce power consumption. The MIP backplane has specific circuits that allow accessing row drivers randomly, and the display driver manages which row should be accessed. Thus, the system is capable of showing a mixture of still and moving images, resulting in low power consumption. A dithering block embedded in the display driver enables to select an appropriate dithering algorithm according to the types of images and the position on the screen. In addition, the novel pixel structure, “three divided patterns”, has been designed to improve image quality and to provide visibility in dark environments. The latter is based on a novel approach; interpixel area is used for an aperture to transmit light from the backlight, and the fringe field from adjacent pixel electrodes is used to control LC directions. The feature of the pixel structure is also effective for obtaining equivalent gamma between reflective and transmissive images. |
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Keywords: | color reflective LCD low power consumption |
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