A low-power sigma-delta modulator for wireless communication receivers using adaptive biasing circuitry and cascaded comparator scheme

This paper represents the low-power signal-delta (ΣΔ) modulator for wireless communication receiver applications. The 2nd-order modulator has a single-loop structure with 11 quantization levels. An adaptive biasing scheme of the operational amplifier and cascaded comparator scheme are proposed in order to save the power consumption. The DAC with three-level references including the analog ground voltage can make the modulator be implemented with half of the input capacitances without degradation of linearity characteristics with the help of dynamic element matching technique. Peak SNR values of 74 dB and 68 dB are achieved with the input bandwidths of 615 kHz and 1.92 MHz for CDMA-2000 and WCDMA applications, respectively. The modulator is fabricated in a 0.13-μm standard digital CMOS technology and dissipates 4.3 mA for a single supply voltage of 2.8 V. Jinup Lim was born in Seoul, Korea, in 1973. He received the B.S. and the M.S. degrees in semiconductor engineering from University of Seoul, Seoul, Korea, in 1999 and 2001, respectively. From 2001 to 2002, he worked in GCT Semiconductor Inc., Seoul, Korea. He is currently working toward the Ph.D. degree in Electrical & Computer Engineering at the same university. He received the Best student paper award from IEEE SSCS/EDS Seoul Chapter in 2004 and the Samsung Best paper award third prize in ISOCC 2004. His research area is the design of high-performance discrete-time / continuous-time sigma-delta modulator circuits. Joongho Choi was born in Seoul, Korea, in 1964. He received the B.S. and the M.S. degrees in electronics engineering from Seoul National University, Seoul, Korea, in 1987 and 1989, respectively. In 1993, he received Ph.D. degree in electrical engineering from University of Southern California, CA, USA. From 1994 to 1996, he worked in IBM T. J. Watson Research Center, NY, USA. In 1996, he joined the University of Seoul, Seoul, where he is currently a professor in the Department of Electrical & Computer Engineering. His research area is the design of high-performance analog integrated circuits.