A 4-Mb low-temperature DRAM |
| |
| Authors: | Henkels W.H. Wen D.-S. Mohler R.L. Franch R.L. Bucelot T.J. Long C.W. Bracchitta J.A. Cote W.J. Bronner G.B. Taur Y. Dennard R.H. |
| |
| Affiliation: | IBM Thomas J. Watson Res. Center, Yorktown Heights, NY; |
| |
| Abstract: | The authors present the characterization of the first dynamic RAM (DRAM) fabricated in a technology specifically optimized for cryogenic operation. With the power supply adjusted to assure hot-electron reliability, the 25-ns 4-Mb low-temperature (LT) chips operated 3 times faster than conventional chips. The LT-optimized chips functioned properly with cycle times as fast as 45 ns, and with a toggle-mode data rate of 667 Mb/s. Wide operating margins and a very large process window for data retention were demonstrated. At a temperature of 85 K the storage retention time of the trench-capacitor memory cells exceeded 8 h. This study shows that the performance leverage offered by low temperature applies equally well to DRAM and to logic. There is no limitation inherent to memory |
| |
| Keywords: | |
|
|
