共享多端口数据Cache结构：SMPDCA

随着半导体工艺技术的飞速发展，单芯片多处理器（Single-Chip Multiprocessor,SCMP)结构将是一条提高处理器性能的有效途径。该文在分析SCMP结构的特点的基础上，提出了SCMP的一种结构实现：共享多端口数据Cache结构（Shared Multi-Ported Data Cache Architecture,SMPDCA).SMPDCA结构具有三个突出的优点：最小的通信延迟、没有Cache一致性维护开销和数据Cache命中率提高。模拟结果表明，与数据Cache私有的结构相比，SMPDCA结构的煅出优点使得应用程序的性能得到了明显的提高，特别是对于改善处理器之间的通信与交互比较多的应用程序的性能具有最为明显的效果。

Shared Multi-Ported Data Cache Architecture:SMPDCA

Come the age of huge scale chip, the research on computer architecture faces new tasks: How to use numerous transistors? How to design microprocessor architecture which is suitable to huge scale chip? Nowadays, all of the microprocessor designs are often based on the superscalar technology, which has little room for improving performance more. So, the Single Chip Multiprocessor (SCMP) architecture which integrates many simple microprocessors on one chip will soon be an efficient way to increase the performance of microprocessor with the improvements in semiconductor technology. There is a problem: In the SCMP architecture which many processors are integrated on one chip, is it necessary to provide private cache for each separate processor? Our research shows that it is more efficient to get higher performance if use shared cache.In this paper, we present the Shared Multi-Ported Data Cache Architecture (SMPDCA) on the basis of analyzing the characteristics of the SCMP architecture. The key idea of SMPDCA architecture is many processors share one multi-ported primary data cache which has many parallel request ports through a crossbar on one chip. This paper present the architecture model of SMPDCA, and discussed its three key techniques: multi-ported data cache, private instruction cache and shared data cache, pipelined data cache.SMPDCA architecture has three outstanding excellences: supplying shortest inter-processor communication latency using the shared L1 data cache and no cost to maintain cache coherence and hit rate of data cache increases. This paper made performance simulations of SPMDCA in detail using RSIM simulator and six parallel applications on SUN Ultra-I 170. Simulation results show that performance of SMPDCA architecture improves about 10%-30% averagely than another architecture which data cache is private, especially the best is about 50% for the parallel applications which has many inter-processor communications. But for less inter-processor communication applications, no improvement.In a word, SMPDCA is a promising processor architecture.