High speed ant colony optimization CMOS chip |
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| Authors: | Kazem Gheysari Abdollah Khoei Behboud Mashoufi |
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| Affiliation: | 1. Faculty of Engineering and Architecture, Department of Material Science and Engineering, Izmir Katip Celebi University, 35620 Izmir, Turkey;2. The Graduate School of Natural and Applied Sciences, Dokuz Eylul University, 35370 Izmir, Turkey;3. Faculty of Engineering and Architecture, Department of Mechanical Engineering, Izmir Katip Celebi University, 35620 Izmir, Turkey;4. The Graduate School of Natural And Applied Sciences, Izmir Katip Celebi University, Izmir, Turkey;5. Faculty of Engineering, Department of Metallurgical and Materials Engineering, Dokuz Eylul University, 35370 Izmir, Turkey;1. Department of Industrial Engineering and Management, National Taipei University of Technology, Taipei 10608, Taiwan;2. Department of Information Management, Yuan Ze University, Taoyuan 32003, Taiwan;1. Shenzhen University, Guangdong, PR China;2. Center for Systems Modeling and Simulation, Indiana State University, IN, USA;1. Karamano?lu Mehmetbey University, Computer Technologies Department, Karaman, Turkey;2. Selçuk University, Computer Engineering Department, Campus, Konya, Turkey;1. Institute of Applied Mathematics and Information Technologies, CNR-IMATI, via Bassini 15, 20133 Milan, Italy;2. European Centre for Living Technology, Ca’ Foscari University of Venice, San Marco 2940, 30124 Venice, Italy;3. Department of Environmental Science, Informatics and Statistics, Ca’ Foscari University of Venice, Dorsoduro 2137, 30123 Venice, Italy;4. Department of Biology, University of Padua, Via U. Bassi 58, 35121 Padua, Italy;5. Explora Biotech S.r.l., Via della Libertá 9, 30175 Venice, Italy |
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| Abstract: | Ant colony optimization (ACO) is an optimization computation inspired by the study of the ant colonies’ behavior. This paper presents design and CMOS implementation of the ant colony optimization based algorithm for solving the TSP problem. In order to implement ant colony optimization algorithm in CMOS, we will present a new algorithm. This algorithm is based on the original ant colony optimization but it can be implemented in CMOS. Briefly, pheromone matrix is transformed on the chip area and ants move up-down through the pheromone matrix and they make their decisions. Finally ants select a global path. In previous researches only pheromone values is used, but select the next city in this paper is based on heuristics value and pheromone value. In definition of problem, we use heuristics value as a matrix. Previous researches could not be used for wide type of optimization problem but our chip gives heuristics value initially and we can change initial value of heuristics value according to the optimization problem so this capability increases the flexibility of ACO chip. Simple circuit is used in blocks of our chip to increase the speed of convergence of ACO chip. We use Linear Feedback Shift Register (LSFR) circuit for random number generator in ACO chip. ACO chip has capability of solving the big TSP problem. ACO chip is simulated by HSPICE software and simulation results show the good performance of final chip. |
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