An associative memory-based learning model with an efficient hardware implementation in FPGA |
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| Authors: | Ali Ahmadi Hans Jürgen Mattausch M. Anwarul Abedin Mahmoud Saeidi Tetsushi Koide |
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| Affiliation: | 1. UMR 7198, Institut Jean Lamour, Université de Lorraine, Nancy, France;2. Laboratoire de Technologie et Imagerie Médicale, Université de Monastir, Monastir, Tunisia;3. Ecole Nationale d’Ingénieur de Sousse, Université de Sousse, Sousse, Tunisia;1. Université Paris Sud-CNRS, Orsay, France;2. Johannes Gutenberg-Universität Mainz, Mainz, Germany;3. Singulus Technology AG, Kahl am Main, Germany;4. IMM-CNR, Agrate Brianza (MB), Italy;5. Micron Semiconductor Italia S.r.l., Agrate Brianza (MB), Italy;6. Universite'' ?Paris-Sud, Orsay, France;7. CEA and Universite'' ?Grenoble Alpes, Grenoble, France;8. University of Cambridge, Cambridge, UK |
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| Abstract: | In this paper we propose a learning model based on a short- and long-term memory and a ranking mechanism which manages the transition of reference vectors between the two memories. Furthermore, an optimization algorithm is used to adjust the reference vectors components as well as their distribution, continuously. Comparing to other learning models like neural networks, the main advantage of the proposed model is that a pre-training phase is unnecessary and it has a hardware-friendly structure which makes it implementable by an efficient LSI architecture without requiring a large amount of resources. A prototype system is implemented on an FPGA platform and tested with real data of handwritten and printed English characters delivering satisfactory classification results. |
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