A 76-dBm IIP2 down-conversion mixer for TD-SCDMA/RFID applications |
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| Authors: | Ying-Dan Jiang Run-Xi Zhang Chun-Qi Shi Zong-Sheng Lai |
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| Affiliation: | 1. No. 58 Institute of China Electronic Technology Corporation, Wuxi, China
2. Institute of Microelectronics Circuit and System, East China Normal University, Shanghai, China
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| Abstract: | This paper presents a semi-active in-phase/quadrature inductor-less down-conversion mixer. The mixer consists of an active trans-conductance stage, a passive current switching stage, and a trans-impedance stage. A complementary input architecture has been used to increase the trans-conductance for a given bias current. An on-chip prescaler is added to provide the balanced LO signals, while the CMFB circuit in trans-conductance stage is designed to enhance linearity. The chip was achieved in a 0.13???m CMOS technology. It features 5?dB conversion gain over a broad range from 800?MHz to 2.1?GHz, which supports Chinese TD-SCDMA/RFID standards simultaneously. The maximum IIP2 is +76?dBm at 2.1?GHz and suitable for application within a direct-conversion receiver. |
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