Support vector machines for surrogate modeling of electronic circuits

In electronic circuit design, preliminary analyses of the circuit performances are generally carried out using time-consuming simulations. These analyses should be performed as fast as possible because of the strict temporal constraints on the industrial sector time to market. On the other hand, there is the need of precision and reliability of the analyses. For these reasons, there is more and more interest toward surrogate models able to approximate the behavior of a device with a high precision making use of a limited set of samples. Using suitable surrogate models instead of simulations, it is possible to perform a reliable analysis in less time. In this work, we are going to analyze how the surrogate models given by the support vector machine (SVM) perform when they are used to approximate the behavior of industrial circuits that will be employed in consumer electronics. The SVM is also compared to the surrogate models given by the response surface methodology using a commercial software currently adopted for this kind of applications.