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An analytic and accurate model for the threshold voltage of short channel MOSFETs in VLSI
Authors:Ching-Yuan Wu  Shui-Yuan Yang  Hsing-Hai Chen  Fang-Churng Tseng  Chih-Tay Shih
Affiliation:Institute of Electronics, National Chiao-Tung University, Hsin-Chu, Taiwan, Republic of China;IC Development Center, Electronics Research and Service Organization, Industrial Technology Research Institute, Hsin-Chu, Taiwan, Republic of China
Abstract:Based on the two-dimensional Poisson equation, the surface potential distribution along the surface channel of a MOSFET has been analytically derived by assuming negligible source and drain junction depths and its minimum potential is then used to determine the threshold voltage. The existence of a minimum surface potential point along the channel of a MOSFET under an applied drain bias is consistent with the numerical results of the two-dimensional analysis. The effects of finite source and drain junction depths have been elegantly included by modifying the depletion capacitance under the gate and the resulted threshold voltage model has been compared to the results of the two-dimensional numerical analysis. It has been shown that excellent agreement between these results has been obtained for wide ranges of substrate doping, gate oxide thickness, channel length (< 1 μm), substrate bias, and drain voltage. Moreover, comparisons between the developed model and the existing experimental data have been made and good agreement has been obtained. The major advantages of the developed model are that no iterations and no adjustable fitting parameters are required. Therefore, this simple and accurate threshold voltage model will become a useful design tool for ultra short channel MOSFETs in future VLSI implementation.
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