| 低功耗VLSI芯片的设计方法 |
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| 引用本文： | 郝冬艳,张明,郑伟. 低功耗VLSI芯片的设计方法[J]. 微电子学与计算机, 2007, 24(6): 137-139,142 |
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| 作者姓名： | 郝冬艳 张明 郑伟 |
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| 作者单位： | 浙江大学,信息电子工程系,浙江,杭州,310027 |
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| 摘 要： | 对便携式电子器件的日益需求已经导致了功耗在IC设计产业的重要性。根据VLSI的设计流程,结合微处理器的工作机制,在系统、行为、结构、逻辑和物理5个层面上对低功耗的设计方法做了全面地分析。
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| 关 键 词： | 低功耗 |
| 文章编号： | 1000-7180（2007）06-0137-03 |
| 修稿时间： | 2006-08-18 |
Low Power Design for VLSI |
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| HAO Dong-yan,ZHANG Ming,ZHENG Wei. Low Power Design for VLSI[J]. Microelectronics & Computer, 2007, 24(6): 137-139,142 |
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| Authors: | HAO Dong-yan ZHANG Ming ZHENG Wei |
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| Affiliation: | Department of Information and Electronics Engineering, Zhejiang University, Hangzhou 310027, China |
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| Abstract: | The growing demand for portable electronic devices has led to an increased emphasis on power consumption within the IC design industry. In this article, according the design flow of VLSI and the working mechanism of the microprocessor, we present a survey of low power design methodology at five levels such as system, behavioral, architectural, logic and physical levels. |
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| Keywords: | VLSI IC |
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