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High-speed, accurate analogue CMOS rank filter
Authors:Fikos   G. Vlassis   S. Siskos   S.
Affiliation:Dept. of Phys., Thessaloniki Univ.;
Abstract:A modular, low-voltage, analogue CMOS architecture for rank extraction based on the use of a simple, compact current amplifying cell is proposed. The circuit has a DC error of <-50 dB for inputs ranging from 100 nA to 30 μA, recovery time of <12 ns, and electronic tunability of the extracted rank
Keywords:
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