High-speed, accurate analogue CMOS rank filter |
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Authors: | Fikos G. Vlassis S. Siskos S. |
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Affiliation: | Dept. of Phys., Thessaloniki Univ.; |
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Abstract: | A modular, low-voltage, analogue CMOS architecture for rank extraction based on the use of a simple, compact current amplifying cell is proposed. The circuit has a DC error of <-50 dB for inputs ranging from 100 nA to 30 μA, recovery time of <12 ns, and electronic tunability of the extracted rank |
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