Conquering noise in deep-submicron digital ICs |
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Authors: | Shepard KL Narayanan V |
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Affiliation: | Dept. of Electr. Eng., Columbia Univ., New York, NY; |
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Abstract: | As feature sizes decrease and clock frequencies increase, noise is becoming a greater concern in digital IC design. The authors describe a verification metric, noise stability, which guarantees functionality in the presence of noise, and a CAD technique, static noise analysis, for applying this metric on a chipwide basis |
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